Open Access

Communication-Oriented Design Space Exploration for Reconfigurable Architectures

EURASIP Journal on Embedded Systems20072007:023496

DOI: 10.1155/2007/23496

Received: 27 June 2006

Accepted: 16 January 2007

Published: 19 March 2007


Many academic works in computer engineering focus on reconfigurable architectures and associated tools. Fine-grain architectures, field programmable gate arrays (FPGAs), are the most well-known structures of reconfigurable hardware. Dedicated tools (generic or specific) allow for the exploration of their design space to choose the best architecture characteristics and/or to explore the application characteristics. The aim is to increase the synergy between the application and the architecture in order to get the best performance. However, there is no generic tool to perform such an exploration for coarse-grain or heterogeneous-grain architectures, just a small number of very specific tools are able to explore a limited set of architectures. To address this major lack, in this paper we propose a new design space exploration approach adapted to fine- and coarse-grain granularities. Our approach combines algorithmic and architecture explorations. It relies on an automatic estimation tool which computes the communication hierarchical distribution and the architectural processing resources use rate for the architecture under exploration. Such an approach forwards the rapid definition of efficient reconfigurable architectures dedicated to one or several applications.

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Authors’ Affiliations

Laboratoire de l'Intégration du Matériau au Système, CNRS UMR5218, Université de Bordeaux 1
Laboratory of Electronic and Real Time Systems (LESTER), CNRS FRE2734, University of South Brittany


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© Lilian Bossuet et al. 2007

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