From: A novel power model for future heterogeneous 3D chip-multiprocessors in the dark silicon age
Parameter | Definition |
---|---|
n | Number of cores in the core layer |
f i | Operation frequency of core i |
\( {P}_i^{\mathrm{core}} \) | Power consumption of core i |
P D, i | Dynamic power consumption of core i |
P L, i | Leakage power consumption of core i |
\( {P}_i^{\mathrm{cache}\_\mathrm{hierarchy}} \) | Sum of power consumption related to the dedicated cache banks in each level of the cache hierarchy stacked on core i from the 1st to the kth level |
\( {P}_{{\mathrm{static}}_k}(T) \) | Static power consumed by each layer of the kth cache level (Lk) at temperature T °C |
N | Number of cache levels L1, L2, …, LN |
C k | Capacity of the kth cache level (Lk) |
b i, k | Number of active cache layers in the region-set bank i stacked on core i at the kth cache level |
B i, k | Accumulated cache capacity in the region-set bank i stacked on core i at the kth cache level |
ar, aw | Number of read and write accesses of an application |
HiT k | Hit time per hit access |
APPH k | Average power consumption per hit access |
γ | Number of accesses per second |
α | Sensitivity coefficient from the cache misses power law |
E n | Data sharing factor [53] |
T s | Total execution time of the mapped applications |
\( {E}_{\mathrm{interconnection}}^s \) | Energy consumption of the interconnection between nodes in Ts |
P interconnection | Power consumption of the interconnection network between nodes |
\( {P}_{n,{n}^{\hbox{'}},{n}^{"}}^q \) | Static power consumption of an interconnection network based on mesh topology with n nodes in dimension 1, n′ nodes in dimension 2, and n′′ nodes in dimension 3 |
\( {P}_{\mathrm{Links}}^{\mathrm{static}} \) | Static power consumption of links |
\( {P}_{TSVs}^{\mathrm{static}} \) | Static power consumption of TSVs |
\( {E}_{NP}^s \) | Average total energy dissipated in the on-chip interconnection network for transferring of NP packets in Ts |
\( {P}_R^{qC} \) | Static power consumption of a router (without any packet) |
\( {P}_R^c \) | Static power consumption of a router with one virtual channel (without any packet) |
\( {P}_{Link}^c \) | Static power consumption of a link (without any packet) |
\( {P}_{TSV}^c \) | Static power consumption of a TSV (without any packet) |
TSV | Total number of TSVs |
\( {E}_{NP}^s \) | Average total energy dissipated in the on-chip interconnection network for transferring of NP packets in Ts |
\( {E}_1^s \) | Average total energy dissipated for transferring of one packet from the source to the destination in the on-chip interconnection network |
\( {E}_R^P \) | Average constant energy dissipated in a router and the related link for a packet transfer |
\( {E}_R^f \) | Average constant energy dissipated in a router and the related link for a flit transfer |
D mesh | The average distance of the mesh topology (the average number of links which a packet transits from the source to reach the destination) |
v | Number of virtual channels per link |
l | Size of a packet based on number of flits |