Open Access

An Efficient Segmental Bus-Invert Coding Method for Instruction Memory Data Bus Switching Reduction

EURASIP Journal on Embedded Systems20092009:973976

DOI: 10.1155/2009/973976

Received: 20 January 2009

Accepted: 3 July 2009

Published: 15 September 2009

Abstract

This paper presents a bus coding methodology for the instruction memory data bus switching reduction. Compared to the existing state-of-the-art multiway partial bus-invert (MPBI) coding which relies on data bit correlation, our approach is very effective in reducing the switching activity of the instruction data buses, since little bit correlation can be observed in the instruction data. Our experiments demonstrate that the proposed encoding can reduce up to 42% of switching activity, with an average of 30% reduction, while MPBI achieves just 17.6% reduction in switching activity.

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Authors’ Affiliations

(1)
School of Computer Science and Engineering, The University of New South Wales

Copyright

© J. Gu and H. Guo. 2009

This article is published under license to BioMed Central Ltd. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.